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Prototype design of a parallel video enhance system using Xilinx FPGA

A set of video enhance prototype using Xilinx Virtex II were developed in 2003. And the video enhance algorithm is designed and running in the following FPGA platform.

FPGA_virtex2_Board
Figure 1. Virtex-II XC2V2000 platform

TopLayerVerilogHDL
Figure 2. Top Layer Structure of Video Enhance VerilogHDL Programming